1. Field of the Invention
The present invention relates to digital signal processing, and more particularly, to a digital signal processing system providing reception and transmission of signals on multiple channels in a simulation testing system.
2. Description of the Prior Art
Simulation testing provides laboratory reproduction of conditions to which a product or material may be exposed in real world use, typically in a compressed time period. An example of such testing is the application of vibration to a test specimen. Sensors or transducers measure continuously, and in real time, motion of, force on and strain on the specimen. In the testing of automobiles, force and motion vectors analogous to those imposed on the automobile when it travels over a road surface are recreated. The testing is used to determine chassis and body fatigue endurance, and to evaluate vehicle noise and vibration under simulated road conditions. Continuing test results are used as feedback to modify the test. Simulation testing is both quicker than conventional testing and can be more precisely directed to an area of interest, for example, fatigue analysis. Engineers control monitoring and testing through appropriately programmed digital computers.
The transducers used to measure the vibration and stress experienced by the specimen typically generate analog output signals. Such output signals must be converted to binary digital signals for use by data processing equipment. The output signals are converted to binary digital signals by analog to digital ("A/D") converters. The digital output signals from the A/D converter are passed to a digital signal processor.
The digital signal processor also processes digital actuation signals for control of the mechanisms used for application of motion to the test specimen. The signals typically control the positioning of valves in hydraulic or like mechanisms.
A digital signal processor is a specialized type of microprocessor which is used to manipulate data before it is transmitted to a computer for analysis. It is used for multirate, multistage digital filtering. The filters are referred to as multirate because they change the data sampling rate at each stage. They are multistage filters because the change in sampling rate is done over a plurality of discrete filtering stages. The digital signal processor also processes digital control signals generated by an analysis computer before transmission to motion generating mechanisms. In the present invention, as well as in prior art systems, digital signal processing is used to decimate an incoming data stream to reduce the rate at which data is provided the data analysis computer. Signal decimation, i.e. the reduction in tee number of data points being provided by an A/D converter, is required because the A/D converter will typically provide data points at a rate faster than the computer can accept.
Reduction in the rate of sampling by the A/D converter of an incoming analog signal is typically not desirable. Analog signals are signals of continuously varying value. Digital computers can operate only on discrete representations of the value of the analog signal as it varies over time. Accordingly, the incoming analog signal must be sample periodically to provide the computer discrete value representations of the analog signal. Sampling is the process of obtaining a sequence of instantaneous values of a waveform, typically at regular time intervals. Sampling must occur frequently enough to avoid generating a false representation of the analog signal, a phenomenon known as aliasing. The rate at which the signal is sampled is the sampling frequency. If a signal has a frequency spectrum of band B, the sampling frequency of the A/D converter must exceed 2B. An A/D converter operating at such a frequency will, in many simulation testing systems, generate data points faster than the computer can use them.
The digital signal processor decimates the data flow from the A/D computer in a fashion that preserves enough information to substantially reconstruct, for data processing purposes, the analog output signal of a transducer while generating output data at a rate that the computer operating on the data can accept. The digital signal processor passes the decimated signal on to the data analyzing computer. While the techniques for signal decimation on a single channel of data are well known, extension of these techniques to multiple channels can lead to difficulties.
Decimation of signals in digital signal processors is preferably done through multirate, multistage digital filters executed by the digital signal processor. Staging providing piecemeal, stepped reduction in frequency reduces computational burdens on the digital signal processor. Nonetheless, certain stages of the multistage filters make heavy computational demands on the machine. Decimation of signals on multiple parallel channels by a digital signal processor can lead to overloading of the digital signal processor, and to the consequent use of more than one digital signal processor to provide for large numbers of channels.
The. digital signal processor is also used, both in the prior art and in the present invention, to process control signals generated by the computer for the actuation of the hydraulic valves controlling the motion applied to the test specimen. It is frequently desirable to interpolate the control signals to smooth the output of the digital to analog converter which is used for actual control of the valves. The term sampling frequency will also be used in this patent to refer to the outputs of stages of an interpolation or upsampling filter operation executed by the digital signal processor. Interpolation or upsampling is the generation of data points intermediate in time to changes in value of the signal to be upsampled, with a value functionally related to two or more values of the digital signal to be upsampled. Where multiple channels are to be upsampled, digital signal processors have been used to execute a plurality of multirate, multistage digital filters in parallel on the channels. This has led to overloading of digital signal processors.